# Install icarus-verilog with Homebrew
Verilog simulation and synthesis tool. Version 13.0 via Homebrew; verified 2026-06-27.
## Install
```sh
sudo av install brew:icarus-verilog
```
Additional install commands:
### macOS
- Homebrew (100%):
```sh
brew install icarus-verilog
```
Evidence: provider-native install command
## Package facts
- **Package key:** brew:icarus-verilog
- **Package manager:** Homebrew
- **Version:** 13.0
- **Source summary:** Verilog simulation and synthesis tool
- **Homepage:**
- **Repository:**
- **Last updated:** 2026-06-27T18:09:14-04:00
- **Generated:** 2026-08-03T00:40:33+00:00
## Executables
- iverilog (alias)
- iverilog-vpi (alias)
- vvp (alias)
## Install behavior
- Bottle: not available
## Freshness
- Page generated: 2026-08-03
- Package-manager version: 13.0
## Project history and usage
Icarus Verilog is a long-running free Verilog compiler and simulation toolchain. It compiles Verilog and a growing subset of SystemVerilog, usually emitting `vvp` bytecode that is then executed by the `vvp` runtime.
### Project history
The project README describes Icarus Verilog as a compiler for the IEEE 1364 Verilog HDL, with partial IEEE 1800 SystemVerilog support, and emphasizes that it is a compiler whose generated code is handled by back-end tools rather than a monolithic traditional simulator.
Its source tree carries a 2000-2026 Stephen Williams copyright line, and its release tags span early 0.8/0.9 series tags through v13_0. The documentation site includes user, target, and developer manuals, reflecting a tool that has accumulated both end-user workflows and internal extension points over decades.
### Adoption history
Icarus Verilog is widely packaged across Unix-like and developer package ecosystems, including Homebrew, Debian/Ubuntu, Fedora, Arch, Nix, MacPorts, Chocolatey, Scoop, winget, and openSUSE according to the input package metadata. That spread mirrors its role as an accessible simulator for students, hobbyists, CI jobs, and open hardware projects.
### How it is used
The basic workflow is to compile Verilog sources with `iverilog -o output input.v` and run the compiled result with `vvp output`. The documentation also covers command files for larger designs, root module selection, waveform viewing, VPI modules, multiple code-generation targets, and developer internals.
### Why package nerds care
Icarus Verilog is one of the canonical open-source EDA packages: old enough to have autotools-era build expectations, important enough to appear in nearly every serious package set, and small enough to be a default answer when a package manager needs a Verilog simulator for tests or education.
### Timeline
- 2000: Source tree copyright range begins for Stephen Williams's Icarus Verilog codebase.
- 2006: Public tags include v8-s20060822 and the 0.8/0.9 release line.
- 2010s: v10 and v11 tags mark continued evolution of the compiler/runtime toolchain.
- 2020s: v12_0 and v13_0 tags mark later standard-conformance, diagnostics, and runtime stability work.
### Related projects
- Related tools and concepts include Verilog HDL, SystemVerilog, IEEE 1364, IEEE 1800, VPI, waveform viewers, open-source EDA flows, and the `vvp` runtime shipped with Icarus Verilog.
### Sources
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## Security Notes
narrow executable package without higher-risk signals.
- **Geiger risk:** green / low
- narrow executable package without higher-risk signals
## Combined YAML source
View the package source record on GitHub. [combined/icarus-verilog.yml](https://github.com/automic-vault/db/blob/main/combined/icarus-verilog.yml)
## Sources
- Nucleus package database
- Geiger risk classifier
- curated package history
- pkgdb category and tag curation